//8192XBR RFE54 version = 35
//RTK66287

//TX TSSI

//S0
//autodck dly
//wire [3:0] r_tssi_dck_auto_start_dly = r_page58_14[21:18];
0x5814	0x200EF000
//wire [3:0] r_tssi_adc_sampling_shift_ofdm = r_page58_1C[24:21];
//wire [3:0] r_tssi_adc_sampling_shift_cck = r_page58_1C[28:25];
0x581c	0x3DC80280
//A
0x5824	0x3FF9B50F
0x582c	0x3FF9B50F
0x5834	0x3FF9B50F
0x583c	0x3FF9B50F
0x5844	0x3FF9B50F
0x584c	0x3FF9B50F
0x5854	0x3FF9B50F
0x585c	0x3FF9B50F
//K
0x5828	0x1000021A
0x5830	0x1000021A
0x5838	0x1000021A
0x5840	0x1000021A
0x5848	0x1000021A
0x5850	0x1000021A
0x5858	0x1000021A
0x5860	0x1000021A


//S1
//autodck dly
//wire [3:0] r_tssi_dck_auto_start_dly = r_page58_14[21:18];
0x7814	0x200EF000
//wire [3:0] r_tssi_adc_sampling_shift_ofdm = r_page78_1C[24:21];
//wire [3:0] r_tssi_adc_sampling_shift_cck = r_page78_1C[28:25];
0x781c	0x3DC80280
//A
0x7824	0x3FF9B50F
0x782c	0x3FF9B50F
0x7834	0x3FF9B50F
0x783c	0x3FF9B50F
0x7844	0x3FF9B50F
0x784c	0x3FF9B50F
0x7854	0x3FF9B50F
0x785c	0x3FF9B50F
//K
0x7828	0x1000021A
0x7830	0x1000021A
0x7838	0x1000021A
0x7840	0x1000021A
0x7848	0x1000021A
0x7850	0x1000021A
0x7858	0x1000021A
0x7860	0x1000021A


//tssi tssi_bypass_by_C_max[8:0] = 0x174 (25dBm) 
0x58d8	0x80080174
0x78d8	0x80080174


//edpd
//txagc_bnd settings 
0x81ac	0x3FD60400 
0x81b0	0x3f914100
0x82ac	0x3FD60400 
0x82b0	0x3f914100
//pwsf
0x81f0	0x0000f078
0x82f0	0x0000f078

//txgapk
//do PSD table
0x8158	0x00001554
0x8170	0x00004000
0x8258	0x00001554
0x8270	0x00004000


//////////////////////////////////////////////////////////


// RX LNA gain/bypass mode:13dB/-7dB
// Path A
// 0x4678[15:8]:gain mode
// 0x4678[7:0]:bypass mode
0x4678	0xC7A334E4

// Path B
// 0x475c[15:8]:gain mode  
// 0x475c[7:0]:bypass mode
0x475c	0xCAAC34E4


// For PHY_REG_GAIN
//rtl8192xb version = 39
0x4698	0xed0f04d1	// r_wbadc_under_th, 0x4698[31:24] = 0xee -> 0xed
0x477c	0xed0f04d1	// r_wbadc_under_th, 0x477c[31:24] = 0xee -> 0xed
0x4694	0x04002b2b	// r_ibadc_sat_th, 0x4694[31:24] = 0x3 -> 0x4
0x4778	0x04002b2b	// r_ibadc_sat_th, 0x4694[31:24] = 0x3 -> 0x4
0x4be4	0xba280000	// r_agc_restart_th_ib_cbw40, 0x4be4[26:23] = 0x5 -> 0x4
0x4ca8	0xba280000	// r_agc_restart_th_ib_cbw40, 0x4ca8[26:23] = 0x5 -> 0x4


0xffff 0xffff